Specifications

• Xilinx XC3S50AN-4TQG144C

  Feature	XC3S50AN
  System Gates	50 K
  Logic Cells	1,584
  Maximum Distributed RAM Bits	11 K
  Maximum user I/O pins(Device)	108
  Maximum user I/O pins( Board)	56
  Total Block RAM Bits	54 K
  Multipliers	3
  DCMs	2
  DSP48As	-

• 56 I/O PAD 100 mil (2.54 mm) grid
• 50 MHz Oscillator(50 ppm)or External
• One User Push-Button Switch
• One User DIP switch One bit
• Two User LEDs
• Three Status LEDs(Power, Done,Awake)
• Power-on Reset IC
• JTAG Connector(7 pin socket)
• JTAG buffer for stable download or debug
• 3.3 V single power supply operation with on-board 1.2 V regulator
• High quality four layers PCB.(Immersion gold)
• Compact size 2.087" x 2.126" (53 x 54 mm)
• Tested all I/O
• RoHS compliance
• MADE IN JAPAN

Package Contents

Item	Image	Quantity
FPGA board(XCM-303-xxx)		1
Pin Headers		2

There is no paper document such as user's manual and circuit schematic in the package.
Please download those documents from the link in the documentation section below.

Documentation

• User's manual, Schematic , etc