Specifications

• Xilinx XC6SLX45T-2FGG484C or　XC6SLX75T-2FGG484C or
  XC6SLX100T-2FGG484C or　XC6SLX150T-2FGG484C
  

  Feature	XC6SLX45T	XC6SLX75T	XC6SLX100T	XC6SLX150T
  Slices	6,822	11,662	15,822	23,038
  Logic Cells	43,661	74,637	101,261	147,443
  Maximum Distributed RAM Bits	401	692	976	1,355
  DSP Slices	58	132	180	180
  Maximum user I/O pins(Device)	296	348	498	540
  Maximum user I/O pins(Board)	128	128	128	128
  Total Block RAM Bits	2,088	3,096	4,824	4,824

  This table is for reference. Please refer to official data-sheets for certain information.

• 128 user I/O(with two 80pin HIROSE connectors)
• Large capacity configuration device (SPI FLASH), in-system programmable by iMPACT
• DDR2 SDRAM(Micron: MT47H64M16HR-3:H, 1Gbit)
  2 Gbit is mountable (custom order)
• Separable CNB VCCO (VIO(B))
• On-board Oscillator, 50MHz(LVTTL)
• RocketIO reference clock (125 MHz, 150MHz)
• Three User Switches (Push x1, Slide x2)
• Two User LEDs
• Two Status LEDs(Power, Done)
• Power-on Reset IC for FPGA configuration
• JTAG port(7 pin socket)
• JTAG buffer for stable download and debug
• 3.3 V single power supply operation with on-board 1.2 V/1.8 V/2.5 V regulators
• High quality ten layers PCB(Immersion gold)
• Compact size 1.693" x 2.126" (43 x 54 mm)
• Tested all I/O
• RoHS compliance
• MADE IN JAPAN

Package Contents

Item	Image	Quantity
FPGA board(XCM-111-***)		1
Sockets(HIROSE 80P)		2

There is no paper document such as user's manual and circuit schematic in the package.
Please download those documents from the link in the documentation section below.

Documentation

• User's manual, Schematic , etc