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DE1-SoC Academic

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    Altera DE1-SoC Board for Academic User
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DE1-SoC Academic
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▶ Academic Product

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Overview

The DE1-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE1-SoC development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.
The DE1-SOC Development Kit contains all components needed to use the board in conjunction with a computer that runs the Microsoft Windows XP or later.

 

 

Specification

 

The DE1-SoC board has many features that allow users to implement a wide range of designed circuits, from simple circuits to various multimedia projects.

The following hardware is provided on the board:

FPGA Device

  • Cyclone V SoC 5CSEMA5F31C6 Device
  • Dual-core ARM Cortex-A9 (HPS)
  • 85K Programmable Logic Elements
  • 4,450 Kbits embedded memory
  • 6 Fractional PLLs
  • 2 Hard Memory Controllers

Configuration and Debug

  • Serial Configuration device – EPCS128 on FPGA
  • On-Board USB Blaster II (Normal type B USB connector)

Memory Device

  • 64MB (32Mx16) SDRAM on FPGA
  • 1GB (2x256Mx16) DDR3 SDRAM on HPS
  • Micro SD Card Socket on HPS

Communication

  • Two Port USB 2.0 Host (ULPI interface with USB type A connector)
  • USB to UART (micro USB type B connector)
  • 10/100/1000 Ethernet
  • PS/2 mouse/keyboard
  • IR Emitter/Receiver

Connectors

  • Two 40-pin Expansion Headers
  • One 10-pin ADC Input Header
  • One LTC connector (One Serial Peripheral Interface (SPI) Master ,one I2C and one GPIO interface )

Display

  • 24-bit VGA DAC

Audio

  • 24-bit CODEC, Line-in, line-out, and microphone-in jacks

Video Input

  • TV Decoder (NTSC/PAL/SECAM) and TV-in connector

ADC

  • Fast throughput rate: 1 MSPS
  • Channel number: 8
  • Resolution: 12 bits
  • Analog input range : 0 ~ 2.5 V or 0 ~ 5V as selected via the RANGE bit in the control registe

Switches, Buttons and Indicators

  • 4 User Keys (FPGA x4)
  • 10 User switches (FPGA x10)
  • 11 User LEDs (FPGA x10 ; HPS x 1)
  • 2 HPS Reset Buttons (HPS_RST_n and HPS_WARM_RST_n)
  • Six 7-segment displays

Sensors

  • G-Sensor on HPS

Power

  • 12V DC input

Block Diagram of the DE1-SOC Board

 

Layout



 

 

  • Size:166*130 mm

Resources

Documents

Title Version Size(KB) Date Added Download
DE1-SoC User Manual (rev.F Board) 2.0.3 7808 2016-08-24
DE1-SoC User Manual(rev.E Board) 1.2.3 7598 2015-08-06
DE1-SoC User Manual(rev.C/rev.D Board) 1.2.2 6472 2015-04-07
DE1-SoC User Manual(rev.B Board) 1.0 9830 2014-02-07
DE1-SoC Learning Roadmap 1.0 2079 2014-02-07

Please note that all the source codes are provided "as is". For further support or modification, please contact Terasic Support and your request will be transferred to Terasic Design Service.
More resources about IP and Dev. Kit are available on Altera User Forums.

BSP(Board Support Package) for Altera SDK OpenCL 14.0

Title Linux Kernel Size(KB) Date Added Download
DE1-SoC OpenCL User Manual -- 2870 KB 2014-11-28
DE1-SoC OpenCL BSP(.zip) 3.12 84.2 MB 2015-01-28
DE1-SoC OpenCL BSP(.tar.gz) 3.12 84.2 MB 2015-01-28

 

BSP(Board Support Package) for Altera SDK OpenCL 16.0

Title Linux Kernel Size(KB) Date Added Download
DE1-SoC OpenCL User Manual -- 2870 KB 2014-11-28
DE1-SoC OpenCL BSP(.zip) 3.10 203557KB 2016-12-05

 

CD-ROM

Title Version Size(KB) Date Added Download
Quartus Download 2013-12-26
DE1SoC SystemBuilder 1.1.1 2016-09-02
DE1-SoC CD-ROM (rev.B Board) 1.2.0 2014-03-25
DE1-SoC CD-ROM (rev.C/rev.D Board) 3.1.3 2015-04-08
DE1-SoC CD-ROM (rev.E Board) 4.0.3 2015-08-07
DE1-SoC CD-ROM (rev.F Board) 5.1.1 2016-09-07
( 64-bit OS and Quartus II 64-bit are required to compile projects for DE1-SoC )

Linux BSP (Board Support Package): MicroSD Card Image

Title Linux Kernel

Min. microSD Capacity

Size(KB) Date Added Download
Linux Console 3.12 4GB 66495 2014-01-14
Linux Console with framebuffer 3.12 4GB 328524 2014-03-24
Linux LXDE Desktop (*) 3.12 8GB 1369526 2014-03-21
Linux Ubuntu Desktop (*) 3.12 8GB 711995 2015-06-26
Linux LXDE Desktop 4.5 8GB 1240466 2016-11-14
Linux Ubuntu Desktop 4.5 8GB 1933049 2016-12-28
(*)It is recommended to use Linux Desktop with kernel 4.5 instread of 3.12

Other course resources you might interested:

School: Cornell UniversitySenior Lecturer: Bruce Land
Course 1: - ECE5760 Advanced Microcontroller Design and system-on-chip [DE2]
Course 2: - ECE 5760 Simplified Floating Point for DSP [DE2]

Compare

※ For more details, plesae click the picture ※

 

Demo



Kit Contents

  • DE1-SoC Board
  • DE1-SoC Quick Start Guide
  • Type A to B USB Cable
  • Type A to Mini-B USB Cable
  • Power DC Adapter (12V)

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DE1-SoC Academic

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