▶ Product Subtitle
A powerful Zynq UltraScale+ 3EG MPSoC development board loaded with peripherals
and a wide hardware ecosystem of add-on modules
▶ Product Description
The Genesys ZU-3EG is a standalone board designed with optimized specs, multimedia and
network connectivity interfaces, with a robust documentation library to quickly get you started on AI, research,
aerospace/defense, cloud computing, and embedded vision applications.
The Xilinx Zynq UltraScale+ MPSoC at the heart of the Genesys ZU-3EG offers heterogenous computing with its ARM A-53 APU and ARM Mali-400 MP2 GPU to go along with a substantial memory interface. A full-featured Type-C connector with USB 3.0 & USB 2.0, Dual-Role-Data and Dual-Role-Power, and integrated gigabit transceivers bringing support for DDR4, USB Type-C 3.1, PCIe, SATA, and DisplayPort surround the chip. The Genesys ZU-3EG supports multiple camera inputs, onboard audio codec, 4K video, and WiFi and 1G Ethernet in a Linux-based platform, rounding out a truly unique and all-encompassing development kit that excels in 5G, cellular radio (WWAN), SSD, wireless radio infrastructure, and video applications like surveillance, streaming, and encoding.
The Genesys ZU-3EG contains Digilent Pmod and high-speed SYZYGY-compatible Zmod ports to allow for flexible expansion and access to high speed, high bandwidth I/O for software defined radio, ultrasound, and a wide variety of other user-defined data acquisition or signal processing systems.
- 256 Mbit QSPI Flash memory onboard
- USB FTDI interface for programming and debugging
- MicroSD card interface, supporting SDR104 mode
- Board status and diagnostics using and onboard platform MCU
▶ Support Materials
▶ Demo / Project Links
- Installing Vivado, Xilinx SDK, and Digilent Board Files
- Note: When installing Vivado, make sure to include support for Zynq Ultrascale+ parts.
- Note: Digilent projects for the Genesys ZU are currently only supported in Vivado 2019.1.
- Getting Started with Vivado IP Integrator
- Note: This guide was originally written for non-Ultrascale Zynq boards and boards using Microblaze. The flow for Ultrascale Zynq is largely the same as non-Ultrascale Zynq. The “Zynq Ultrascale+ MPSoC” IP core should be used in place of the “ZYNQ7 Processing System”
- Genesys ZU Out-of-Box Vivado Project
- Genesys ZU Out-of-Box Petalinux Project
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