Specifications

• ALTERA EP2AGX45DF25C6N , EP2AGX65DF25C6N,
  EP2AGX95DF25C6N or EP2AGX125DF25C6N

  Feature	EP2AGX45	EP2AGX65	EP2AGX95	EP2AGX125
  ALMs	18,050	25,300	37,470	49,640
  Logic Elements	42,959	60,214	89,178	118,143
  PLLs	4	4	6	6
  Maximum user I/O pins(Device)	364	364	452	452
  Maximum user I/O pins(Board)	100	100	100	100
  Embedded Memory(kbits)	3,435	5,246	6,679	8,121
  Multipliers	232	312	448	576

  This table is for reference. Please refer to official data-sheets for certain information.

• ATLGX High speed serial interface through SIF40 connector
• DDR2 SDRAM(Micron: MT47H64M16HR-3, 1 Gbit/2 Gbit (custom))
• Configuration Device(Altera, EPCS64)
• 100 I/O PAD 100 mil (2.54 mm) grid
• Separated VCCIO input (VIO(B))
• On-board Oscillators (30MHz, 50MHz)
• External clock inputs through user I/O connectors
• On-board ALTGX reference clock (125MHz and MMCX connector)
• Four User Switches (push x2, slide x2)
• Eight User LEDs
• Two Status LEDs (Power, Done)
• Power-on Reset IC for FPGA configuration
• JTAG port(10 pin socket) for ByteBlaster[MV/II] and USB Blaster
• 3.3 V single power supply operation with on-board 2.5 V/1.8V/1.5 V/1.1/ 0.9 V regulators
• High quality ten layers PCB.(Immersion gold)
• Credit-Card-Size 3.386"x 2.126" (86 x 54 mm)
• Tested all I/O
• RoHS compliance
• MADE IN JAPAN

Package Contents

Item	Image	Quantity
FPGA Board(ACM-025-***)		1
Pin Headers		2
Sockets		2

There is no paper document such as user's manual and circuit schematic in the package.
Please download those documents from the link in the documentation section below.

Documentation

• User's manual, Schematic , etc